57 lines
1.4 KiB
Python
57 lines
1.4 KiB
Python
"""
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use the LUNA usb config for the tinyFPGA-Bx
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add some pins (at random) for adat and debug
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create an audio clock domain
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Issues:
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The audio clock is just a carbon copy of usb 12MHz because the Bx only has one PLL.
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"""
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import os
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import logging
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import subprocess
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from amaranth import *
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from amaranth.build import *
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from amaranth_boards.resources import *
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from luna.gateware.platform.tinyfpga import TinyFPGABxPlatform, TinyFPGABxDomainGenerator
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class TinyBxAdatDomainGenerator(Elaboratable):
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""" Creates audio clock domains on top of the LUNA domains for the TinyFPGA Bx. """
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def elaborate(self, platform):
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m = TinyFPGABxDomainGenerator.elaborate(self, platform)
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# Create our domains...
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m.domains.adat = ClockDomain()
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m.d.comb += [
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ClockSignal("adat").eq(ClockSignal("usb")),
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ResetSignal("adat").eq(ResetSignal("usb")),
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]
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return m
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class TinyBxAdatPlatform(TinyFPGABxPlatform):
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clock_domain_generator = TinyBxAdatDomainGenerator
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number_of_channels = 4
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bitwidth = 24
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def __init__(self):
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self.resources += [
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Resource("adat", 0,
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Subsignal("tx", Pins("A2", dir="o")),
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Subsignal("rx", Pins("A1", dir="i")),
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Attrs(IO_STANDARD="SB_LVCMOS")),
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Resource("debug_led", 0, Pins("C9 A9 B8 A8 B7 A7 B6 A6", dir="o"),
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Attrs(IO_STANDARD="SB_LVCMOS")),
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]
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super().__init__(toolchain="IceStorm")
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