24l: exact FIR-loop decode from asm — pre-exp sign inversion (div by -1, xmm13) + upper-half zeroing (xmm9=0); step-1 multiplier is NO-OP (xmm8=1.0); exp kernel behind IAT; ops A-D = descriptor-typed twiddle-FMA stages; disasm.py tool

2026-08-24 19:13:49 +03:00
parent 65fb983d57
commit 3a611cff35
2 changed files with 91 additions and 0 deletions
@@ -0,0 +1,31 @@
+#!/usr/bin/env python3
+"""dis.py — quick capstone disassembler for soothe_mem.bin (base 0x180000000).
+Usage: dis.py <VA> [len] [va2 len2 ...]
+"""
+import sys
+from capstone import Cs, CS_ARCH_X86, CS_MODE_64
+
+BASE = 0x180000000
+_data = open('/home/m/re-tools/soothe_mem.bin', 'rb').read()
+
+def dis(va, n=256):
+    off = va - BASE
+    code = _data[off:off + n]
+    md = Cs(CS_ARCH_X86, CS_MODE_64)
+    md.detail = False
+    out = []
+    for ins in md.disasm(code, va):
+        s = '%08x  %-24s %s %s' % (ins.address, ins.bytes.hex(),
+                                   ins.mnemonic, ins.op_str)
+        out.append(s)
+        if ins.mnemonic == 'ret':
+            break
+    return '\n'.join(out)
+
+if __name__ == '__main__':
+    a = sys.argv[1:]
+    for i in range(0, len(a), 2):
+        va = int(a[i], 16)
+        n = int(a[i + 1], 16) if i + 1 < len(a) else 256
+        print('==== %x (len %x) ====' % (va, n))
+        print(dis(va, n))