From 41b0d3c25080e21ad0bce086ec04b6d4d0f01add Mon Sep 17 00:00:00 2001 From: Matiq Date: Sat, 22 Aug 2026 19:10:50 +0300 Subject: [PATCH] =?UTF-8?q?22f:=20floor=20discrimination=20via=20param=20b?= =?UTF-8?q?ridge=20=E2=80=94=20dry/wet=20crossfade=20confirmed,=20floors?= =?UTF-8?q?=3Dk*ln10/20,=20detector-cap=20hypothesis=20leads?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- handoff/NOTES_LEVEL.md | 30 ++++++ handoff/nls_dasm/f_4d56b0.dis | 178 ++++++++++++++++++++++++++++++++++ handoff/nls_dasm/f_52baa0.dis | 176 +++++++++++++++++++++++++++++++++ handoff/nls_dasm/f_52bad0.dis | 172 ++++++++++++++++++++++++++++++++ handoff/nls_dasm/f_52bba0.dis | 148 ++++++++++++++++++++++++++++ 5 files changed, 704 insertions(+) create mode 100644 handoff/nls_dasm/f_4d56b0.dis create mode 100644 handoff/nls_dasm/f_52baa0.dis create mode 100644 handoff/nls_dasm/f_52bad0.dis create mode 100644 handoff/nls_dasm/f_52bba0.dis diff --git a/handoff/NOTES_LEVEL.md b/handoff/NOTES_LEVEL.md index 1516c8d..16b7f26 100644 --- a/handoff/NOTES_LEVEL.md +++ b/handoff/NOTES_LEVEL.md @@ -1543,3 +1543,33 @@ Audio-референсы константы: **FUN_180529c60**, 18052baa0, 18052 2. Проверка предсказания: floor_gain(mix) должен сдвигаться как 20log10(blend′/0.8) (рендер mix=50% через мост). 3. Порт найденного клампа в структурную цепь → корпус с гейтом vs bridge. + +## ============ UPDATE 2026-08-22f: FLOOR DISCRIMINATION — 3 гипотезы, детекторный кап ============ + +Дискриминационные рендеры (hot-тон, trim+12, через параметр-мост): +| конфиг | gain изм. | mask=10^(g/20) | интерпретация | +|--------|-----------|----------------|----------------| +| mix100 sens12 | −20.72 | **0.8·ln10/20** | базовый пол | +| mix50 sens12 | −5.20 | eff 0.552=out/dry | **dry/wet кроссфейд**: 0.5+0.5·0.0921=0.546→−5.26 ✓ | +| mix100 sens6 | −18.78 | **1.0·ln10/20** | пол сдвинулся ровно на ×ln10/20 | + +ОПРОВЕРГНУТЫ: (а) явный кламп mask≥const (mix50 должен был остаться −20.72); +(б) blend-floor 20log10(blend′·ln10/20) для mix50 (предсказывал −26.74); +(в) naive detector-sat lvl∝sens (предсказывал −11.33 для sens6). + +ЧТО СОШЛОСЬ: +1. Mix = классический кроссфейд out=(1−m)·dry+m·processed; пол в PROCESSED пути. +2. Полы = ТОЧНЫЕ кратные ln10/20: {0.8× @sens12; 1.0× @sens6}. +3. Движение пина с sens: Δx_exp2 = log2(mask/0.8): −3.1188→−2.7996, Δ=−0.3192 + на 6 dB sens ⇒ наклон −0.0532 dB⁻¹ ≈ аффинный закон Phase A (−0.05877!) + ⇒ похоже, что НАСЫЩАЕТСЯ ДЕТЕКТОР (кап его dB_lvl ≈ 36..42 в завис. от sens), + а редукция следует аффинному закону до этого капа. Точные значения ln10/20 + при этом — след пересечения закона с сеткой экспонент, не отдельный кламп. +4. Наша модель на том же материале достигает lvl_max=3.012 ≈ log2(ln10/20)=3.1188 + (Δ3.5%) — почти касание первого пола естественно (RT_DUMP_ALL render48k). + +### NEXT (Шаг 9 продолжение) +1. Локализовать кап детектора: где dB_lvl перестаёт расти (vlog/leveltrack путь, + FUN_18052d650 IIR1 / leveltrack таблицы) — искать ограничитель амплитуды FFT/am. +2. Точная формула капа от sens: снять полы на сетке sens {3,6,9,12} × trim{18,24}. +3. Порт: вместо t-clamp LUT — детекторный кап + аффинный закон Phase A; корпус с гейтом. diff --git a/handoff/nls_dasm/f_4d56b0.dis b/handoff/nls_dasm/f_4d56b0.dis new file mode 100644 index 0000000..8e5ef16 --- /dev/null +++ b/handoff/nls_dasm/f_4d56b0.dis @@ -0,0 +1,178 @@ +00000001804d56b0 <.data>: + 1804d56b0: 48 83 ec 28 sub $0x28,%rsp + 1804d56b4: 48 8b 05 b5 02 14 02 mov 0x21402b5(%rip),%rax # 0x182615970 + 1804d56bb: 48 33 c4 xor %rsp,%rax + 1804d56be: 48 89 44 24 10 mov %rax,0x10(%rsp) + 1804d56c3: 8b c2 mov %edx,%eax + 1804d56c5: 44 8b c2 mov %edx,%r8d + 1804d56c8: 99 cltd + 1804d56c9: 83 e2 03 and $0x3,%edx + 1804d56cc: 03 c2 add %edx,%eax + 1804d56ce: c1 f8 02 sar $0x2,%eax + 1804d56d1: 83 f8 01 cmp $0x1,%eax + 1804d56d4: 0f 8e f6 00 00 00 jle 0x1804d57d0 + 1804d56da: ff c8 dec %eax + 1804d56dc: f6 c1 0f test $0xf,%cl + 1804d56df: 75 1f jne 0x1804d5700 + 1804d56e1: 0f 10 09 movups (%rcx),%xmm1 + 1804d56e4: 85 c0 test %eax,%eax + 1804d56e6: 7e 39 jle 0x1804d5721 + 1804d56e8: 0f 1f 84 00 00 00 00 nopl 0x0(%rax,%rax,1) + 1804d56ef: 00 + 1804d56f0: 0f 5f 49 10 maxps 0x10(%rcx),%xmm1 + 1804d56f4: 48 83 c1 10 add $0x10,%rcx + 1804d56f8: ff c8 dec %eax + 1804d56fa: 85 c0 test %eax,%eax + 1804d56fc: 7f f2 jg 0x1804d56f0 + 1804d56fe: eb 21 jmp 0x1804d5721 + 1804d5700: 0f 10 09 movups (%rcx),%xmm1 + 1804d5703: 85 c0 test %eax,%eax + 1804d5705: 7e 1a jle 0x1804d5721 + 1804d5707: 66 0f 1f 84 00 00 00 nopw 0x0(%rax,%rax,1) + 1804d570e: 00 00 + 1804d5710: 0f 10 41 10 movups 0x10(%rcx),%xmm0 + 1804d5714: 48 83 c1 10 add $0x10,%rcx + 1804d5718: ff c8 dec %eax + 1804d571a: 0f 5f c8 maxps %xmm0,%xmm1 + 1804d571d: 85 c0 test %eax,%eax + 1804d571f: 7f ef jg 0x1804d5710 + 1804d5721: 0f 28 c1 movaps %xmm1,%xmm0 + 1804d5724: 0f c6 c1 aa shufps $0xaa,%xmm1,%xmm0 + 1804d5728: 0f 11 0c 24 movups %xmm1,(%rsp) + 1804d572c: f3 0f 10 5c 24 0c movss 0xc(%rsp),%xmm3 + 1804d5732: 0f c6 c9 55 shufps $0x55,%xmm1,%xmm1 + 1804d5736: 0f 2f c1 comiss %xmm1,%xmm0 + 1804d5739: 76 06 jbe 0x1804d5741 + 1804d573b: f3 0f 5f d8 maxss %xmm0,%xmm3 + 1804d573f: eb 04 jmp 0x1804d5745 + 1804d5741: f3 0f 5f d9 maxss %xmm1,%xmm3 + 1804d5745: f3 0f 5f 1c 24 maxss (%rsp),%xmm3 + 1804d574a: 33 c0 xor %eax,%eax + 1804d574c: 41 83 e0 03 and $0x3,%r8d + 1804d5750: 49 83 f8 04 cmp $0x4,%r8 + 1804d5754: 7c 47 jl 0x1804d579d + 1804d5756: 4d 8d 48 fc lea -0x4(%r8),%r9 + 1804d575a: 49 c1 e9 02 shr $0x2,%r9 + 1804d575e: 48 8d 51 18 lea 0x18(%rcx),%rdx + 1804d5762: 49 ff c1 inc %r9 + 1804d5765: 4a 8d 04 8d 00 00 00 lea 0x0(,%r9,4),%rax + 1804d576c: 00 + 1804d576d: 0f 1f 00 nopl (%rax) + 1804d5770: f3 0f 10 42 f8 movss -0x8(%rdx),%xmm0 + 1804d5775: f3 0f 10 4a fc movss -0x4(%rdx),%xmm1 + 1804d577a: f3 0f 5f c3 maxss %xmm3,%xmm0 + 1804d577e: f3 0f 10 12 movss (%rdx),%xmm2 + 1804d5782: f3 0f 10 5a 04 movss 0x4(%rdx),%xmm3 + 1804d5787: 48 8d 52 10 lea 0x10(%rdx),%rdx + 1804d578b: f3 0f 5f c8 maxss %xmm0,%xmm1 + 1804d578f: f3 0f 5f d1 maxss %xmm1,%xmm2 + 1804d5793: f3 0f 5f da maxss %xmm2,%xmm3 + 1804d5797: 49 83 e9 01 sub $0x1,%r9 + 1804d579b: 75 d3 jne 0x1804d5770 + 1804d579d: 49 3b c0 cmp %r8,%rax + 1804d57a0: 0f 8d b0 00 00 00 jge 0x1804d5856 + 1804d57a6: f3 0f 10 4c 81 10 movss 0x10(%rcx,%rax,4),%xmm1 + 1804d57ac: 48 ff c0 inc %rax + 1804d57af: f3 0f 5f cb maxss %xmm3,%xmm1 + 1804d57b3: 0f 28 d9 movaps %xmm1,%xmm3 + 1804d57b6: 49 3b c0 cmp %r8,%rax + 1804d57b9: 7c eb jl 0x1804d57a6 + 1804d57bb: 0f 28 c1 movaps %xmm1,%xmm0 + 1804d57be: 48 8b 4c 24 10 mov 0x10(%rsp),%rcx + 1804d57c3: 48 33 cc xor %rsp,%rcx + 1804d57c6: e8 05 b9 c5 00 call 0x1811310d0 + 1804d57cb: 48 83 c4 28 add $0x28,%rsp + 1804d57cf: c3 ret + 1804d57d0: 45 85 c0 test %r8d,%r8d + 1804d57d3: 7f 18 jg 0x1804d57ed + 1804d57d5: 0f 57 db xorps %xmm3,%xmm3 + 1804d57d8: 0f 28 c3 movaps %xmm3,%xmm0 + 1804d57db: 48 8b 4c 24 10 mov 0x10(%rsp),%rcx + 1804d57e0: 48 33 cc xor %rsp,%rcx + 1804d57e3: e8 e8 b8 c5 00 call 0x1811310d0 + 1804d57e8: 48 83 c4 28 add $0x28,%rsp + 1804d57ec: c3 ret + 1804d57ed: f3 0f 10 19 movss (%rcx),%xmm3 + 1804d57f1: 41 8d 50 ff lea -0x1(%r8),%edx + 1804d57f5: 48 83 c1 04 add $0x4,%rcx + 1804d57f9: 83 fa 04 cmp $0x4,%edx + 1804d57fc: 7c 3f jl 0x1804d583d + 1804d57fe: 8d 42 fc lea -0x4(%rdx),%eax + 1804d5801: c1 e8 02 shr $0x2,%eax + 1804d5804: ff c0 inc %eax + 1804d5806: 44 8b c0 mov %eax,%r8d + 1804d5809: f7 d8 neg %eax + 1804d580b: 8d 14 82 lea (%rdx,%rax,4),%edx + 1804d580e: 66 90 xchg %ax,%ax + 1804d5810: f3 0f 10 01 movss (%rcx),%xmm0 + 1804d5814: f3 0f 10 49 04 movss 0x4(%rcx),%xmm1 + 1804d5819: f3 0f 5f c3 maxss %xmm3,%xmm0 + 1804d581d: f3 0f 10 51 08 movss 0x8(%rcx),%xmm2 + 1804d5822: f3 0f 10 59 0c movss 0xc(%rcx),%xmm3 + 1804d5827: 48 83 c1 10 add $0x10,%rcx + 1804d582b: f3 0f 5f c8 maxss %xmm0,%xmm1 + 1804d582f: f3 0f 5f d1 maxss %xmm1,%xmm2 + 1804d5833: f3 0f 5f da maxss %xmm2,%xmm3 + 1804d5837: 49 83 e8 01 sub $0x1,%r8 + 1804d583b: 75 d3 jne 0x1804d5810 + 1804d583d: 85 d2 test %edx,%edx + 1804d583f: 7e 15 jle 0x1804d5856 + 1804d5841: f3 0f 10 09 movss (%rcx),%xmm1 + 1804d5845: 48 8d 49 04 lea 0x4(%rcx),%rcx + 1804d5849: f3 0f 5f cb maxss %xmm3,%xmm1 + 1804d584d: ff ca dec %edx + 1804d584f: 0f 28 d9 movaps %xmm1,%xmm3 + 1804d5852: 85 d2 test %edx,%edx + 1804d5854: 7f eb jg 0x1804d5841 + 1804d5856: 0f 28 c3 movaps %xmm3,%xmm0 + 1804d5859: 48 8b 4c 24 10 mov 0x10(%rsp),%rcx + 1804d585e: 48 33 cc xor %rsp,%rcx + 1804d5861: e8 6a b8 c5 00 call 0x1811310d0 + 1804d5866: 48 83 c4 28 add $0x28,%rsp + 1804d586a: c3 ret + 1804d586b: cc int3 + 1804d586c: cc int3 + 1804d586d: cc int3 + 1804d586e: cc int3 + 1804d586f: cc int3 + 1804d5870: 48 89 5c 24 20 mov %rbx,0x20(%rsp) + 1804d5875: 41 56 push %r14 + 1804d5877: 48 83 ec 20 sub $0x20,%rsp + 1804d587b: 8b 59 0c mov 0xc(%rcx),%ebx + 1804d587e: 4c 8b f1 mov %rcx,%r14 + 1804d5881: 83 eb 01 sub $0x1,%ebx + 1804d5884: 78 7f js 0x1804d5905 + 1804d5886: 48 89 6c 24 30 mov %rbp,0x30(%rsp) + 1804d588b: 48 89 74 24 38 mov %rsi,0x38(%rsp) + 1804d5890: 48 63 c3 movslq %ebx,%rax + 1804d5893: 48 89 7c 24 40 mov %rdi,0x40(%rsp) + 1804d5898: 48 8d 3c c5 00 00 00 lea 0x0(,%rax,8),%rdi + 1804d589f: 00 + 1804d58a0: 48 8b f7 mov %rdi,%rsi + 1804d58a3: 0f 1f 40 00 nopl 0x0(%rax) + 1804d58a7: 66 0f 1f 84 00 00 00 nopw 0x0(%rax,%rax,1) + 1804d58ae: 00 00 + 1804d58b0: 49 8b 06 mov (%r14),%rax + 1804d58b3: 48 8b 2c 07 mov (%rdi,%rax,1),%rbp + 1804d58b7: 48 8d 0c 06 lea (%rsi,%rax,1),%rcx + 1804d58bb: 41 8b 46 0c mov 0xc(%r14),%eax + 1804d58bf: 48 8d 51 08 lea 0x8(%rcx),%rdx + 1804d58c3: 2b c3 sub %ebx,%eax + 1804d58c5: ff c8 dec %eax + 1804d58c7: 4c 63 c0 movslq %eax,%r8 + 1804d58ca: 49 c1 e0 03 shl $0x3,%r8 + 1804d58ce: e8 b7 cf c5 00 call 0x18113288a + 1804d58d3: 41 ff 4e 0c decl 0xc(%r14) + 1804d58d7: 48 85 ed test %rbp,%rbp + 1804d58da: 74 0d je 0x1804d58e9 + 1804d58dc: ba 24 00 00 00 mov $0x24,%edx + 1804d58e1: 48 8b cd mov %rbp,%rcx + 1804d58e4: e8 0b b8 c5 00 call 0x1811310f4 + 1804d58e9: 48 83 ee 08 sub $0x8,%rsi + 1804d58ed: 48 83 ef 08 sub $0x8,%rdi + 1804d58f1: 83 eb 01 sub $0x1,%ebx + 1804d58f4: 79 ba jns 0x1804d58b0 + 1804d58f6: 48 8b 7c 24 40 mov 0x40(%rsp),%rdi + 1804d58fb: 48 8b 74 24 38 mov 0x38(%rsp),%rsi + 1804d5900: 48 8b 6c 24 30 mov 0x30(%rsp),%rbp + 1804d5905: 49 8b 0e mov (%r14),%rcx diff --git a/handoff/nls_dasm/f_52baa0.dis b/handoff/nls_dasm/f_52baa0.dis new file mode 100644 index 0000000..c058b33 --- /dev/null +++ b/handoff/nls_dasm/f_52baa0.dis @@ -0,0 +1,176 @@ +000000018052baa0 <.data>: + 18052baa0: 40 53 rex push %rbx + 18052baa2: 48 83 ec 20 sub $0x20,%rsp + 18052baa6: f3 0f 59 0d 26 82 f9 mulss 0x1f98226(%rip),%xmm1 # 0x1824c3cd4 + 18052baad: 01 + 18052baae: 48 8b d9 mov %rcx,%rbx + 18052bab1: 0f 28 c1 movaps %xmm1,%xmm0 + 18052bab4: e8 f3 91 4e 01 call 0x181a14cac + 18052bab9: f3 0f 11 83 8c 08 54 movss %xmm0,0x54088c(%rbx) + 18052bac0: 00 + 18052bac1: 48 83 c4 20 add $0x20,%rsp + 18052bac5: 5b pop %rbx + 18052bac6: c3 ret + 18052bac7: cc int3 + 18052bac8: cc int3 + 18052bac9: cc int3 + 18052baca: cc int3 + 18052bacb: cc int3 + 18052bacc: cc int3 + 18052bacd: cc int3 + 18052bace: cc int3 + 18052bacf: cc int3 + 18052bad0: 40 53 rex push %rbx + 18052bad2: 48 83 ec 20 sub $0x20,%rsp + 18052bad6: f3 0f 59 0d f6 81 f9 mulss 0x1f981f6(%rip),%xmm1 # 0x1824c3cd4 + 18052badd: 01 + 18052bade: 48 8b d9 mov %rcx,%rbx + 18052bae1: 0f 28 c1 movaps %xmm1,%xmm0 + 18052bae4: e8 c3 91 4e 01 call 0x181a14cac + 18052bae9: f3 0f 11 83 88 08 54 movss %xmm0,0x540888(%rbx) + 18052baf0: 00 + 18052baf1: 48 83 c4 20 add $0x20,%rsp + 18052baf5: 5b pop %rbx + 18052baf6: c3 ret + 18052baf7: cc int3 + 18052baf8: cc int3 + 18052baf9: cc int3 + 18052bafa: cc int3 + 18052bafb: cc int3 + 18052bafc: cc int3 + 18052bafd: cc int3 + 18052bafe: cc int3 + 18052baff: cc int3 + 18052bb00: f3 0f 11 4c 24 10 movss %xmm1,0x10(%rsp) + 18052bb06: 8b 44 24 10 mov 0x10(%rsp),%eax + 18052bb0a: 87 81 74 08 54 00 xchg %eax,0x540874(%rcx) + 18052bb10: c3 ret + 18052bb11: cc int3 + 18052bb12: cc int3 + 18052bb13: cc int3 + 18052bb14: cc int3 + 18052bb15: cc int3 + 18052bb16: cc int3 + 18052bb17: cc int3 + 18052bb18: cc int3 + 18052bb19: cc int3 + 18052bb1a: cc int3 + 18052bb1b: cc int3 + 18052bb1c: cc int3 + 18052bb1d: cc int3 + 18052bb1e: cc int3 + 18052bb1f: cc int3 + 18052bb20: ff 81 a4 08 54 00 incl 0x5408a4(%rcx) + 18052bb26: f3 0f 11 89 84 08 54 movss %xmm1,0x540884(%rcx) + 18052bb2d: 00 + 18052bb2e: c6 81 a0 08 54 00 01 movb $0x1,0x5408a0(%rcx) + 18052bb35: c3 ret + 18052bb36: cc int3 + 18052bb37: cc int3 + 18052bb38: cc int3 + 18052bb39: cc int3 + 18052bb3a: cc int3 + 18052bb3b: cc int3 + 18052bb3c: cc int3 + 18052bb3d: cc int3 + 18052bb3e: cc int3 + 18052bb3f: cc int3 + 18052bb40: ff 81 a4 08 54 00 incl 0x5408a4(%rcx) + 18052bb46: f3 0f 11 89 80 08 54 movss %xmm1,0x540880(%rcx) + 18052bb4d: 00 + 18052bb4e: c6 81 9f 08 54 00 01 movb $0x1,0x54089f(%rcx) + 18052bb55: c3 ret + 18052bb56: cc int3 + 18052bb57: cc int3 + 18052bb58: cc int3 + 18052bb59: cc int3 + 18052bb5a: cc int3 + 18052bb5b: cc int3 + 18052bb5c: cc int3 + 18052bb5d: cc int3 + 18052bb5e: cc int3 + 18052bb5f: cc int3 + 18052bb60: ff 81 a4 08 54 00 incl 0x5408a4(%rcx) + 18052bb66: f3 0f 11 89 7c 08 54 movss %xmm1,0x54087c(%rcx) + 18052bb6d: 00 + 18052bb6e: c6 81 9e 08 54 00 01 movb $0x1,0x54089e(%rcx) + 18052bb75: c3 ret + 18052bb76: cc int3 + 18052bb77: cc int3 + 18052bb78: cc int3 + 18052bb79: cc int3 + 18052bb7a: cc int3 + 18052bb7b: cc int3 + 18052bb7c: cc int3 + 18052bb7d: cc int3 + 18052bb7e: cc int3 + 18052bb7f: cc int3 + 18052bb80: ff 81 a4 08 54 00 incl 0x5408a4(%rcx) + 18052bb86: f3 0f 11 89 78 08 54 movss %xmm1,0x540878(%rcx) + 18052bb8d: 00 + 18052bb8e: c6 81 9d 08 54 00 01 movb $0x1,0x54089d(%rcx) + 18052bb95: c3 ret + 18052bb96: cc int3 + 18052bb97: cc int3 + 18052bb98: cc int3 + 18052bb99: cc int3 + 18052bb9a: cc int3 + 18052bb9b: cc int3 + 18052bb9c: cc int3 + 18052bb9d: cc int3 + 18052bb9e: cc int3 + 18052bb9f: cc int3 + 18052bba0: 40 53 rex push %rbx + 18052bba2: 48 83 ec 20 sub $0x20,%rsp + 18052bba6: f3 0f 59 0d 9a 87 f9 mulss 0x1f9879a(%rip),%xmm1 # 0x1824c4348 + 18052bbad: 01 + 18052bbae: 48 8b d9 mov %rcx,%rbx + 18052bbb1: f3 0f 58 0d eb 88 f9 addss 0x1f988eb(%rip),%xmm1 # 0x1824c44a4 + 18052bbb8: 01 + 18052bbb9: f3 0f 59 0d 13 81 f9 mulss 0x1f98113(%rip),%xmm1 # 0x1824c3cd4 + 18052bbc0: 01 + 18052bbc1: 0f 28 c1 movaps %xmm1,%xmm0 + 18052bbc4: e8 e3 90 4e 01 call 0x181a14cac + 18052bbc9: ff 83 a4 08 54 00 incl 0x5408a4(%rbx) + 18052bbcf: f3 0f 11 83 70 08 54 movss %xmm0,0x540870(%rbx) + 18052bbd6: 00 + 18052bbd7: c6 83 9c 08 54 00 01 movb $0x1,0x54089c(%rbx) + 18052bbde: 48 83 c4 20 add $0x20,%rsp + 18052bbe2: 5b pop %rbx + 18052bbe3: c3 ret + 18052bbe4: cc int3 + 18052bbe5: cc int3 + 18052bbe6: cc int3 + 18052bbe7: cc int3 + 18052bbe8: cc int3 + 18052bbe9: cc int3 + 18052bbea: cc int3 + 18052bbeb: cc int3 + 18052bbec: cc int3 + 18052bbed: cc int3 + 18052bbee: cc int3 + 18052bbef: cc int3 + 18052bbf0: 8b 81 a0 01 00 00 mov 0x1a0(%rcx),%eax + 18052bbf6: c3 ret + 18052bbf7: cc int3 + 18052bbf8: cc int3 + 18052bbf9: cc int3 + 18052bbfa: cc int3 + 18052bbfb: cc int3 + 18052bbfc: cc int3 + 18052bbfd: cc int3 + 18052bbfe: cc int3 + 18052bbff: cc int3 + 18052bc00: 45 33 c9 xor %r9d,%r9d + 18052bc03: 4c 89 09 mov %r9,(%rcx) + 18052bc06: 45 8b c1 mov %r9d,%r8d + 18052bc09: 44 39 49 18 cmp %r9d,0x18(%rcx) + 18052bc0d: 7e 27 jle 0x18052bc36 + 18052bc0f: 41 8b d1 mov %r9d,%edx + 18052bc12: 0f 1f 40 00 nopl 0x0(%rax) + 18052bc16: 66 66 0f 1f 84 00 00 data16 nopw 0x0(%rax,%rax,1) + 18052bc1d: 00 00 00 + 18052bc20: 48 8b 41 10 mov 0x10(%rcx),%rax + 18052bc24: 48 8d 52 04 lea 0x4(%rdx),%rdx + 18052bc28: 41 ff c0 inc %r8d + 18052bc2b: 44 89 4c 02 fc mov %r9d,-0x4(%rdx,%rax,1) diff --git a/handoff/nls_dasm/f_52bad0.dis b/handoff/nls_dasm/f_52bad0.dis new file mode 100644 index 0000000..60950c1 --- /dev/null +++ b/handoff/nls_dasm/f_52bad0.dis @@ -0,0 +1,172 @@ +000000018052bad0 <.data>: + 18052bad0: 40 53 rex push %rbx + 18052bad2: 48 83 ec 20 sub $0x20,%rsp + 18052bad6: f3 0f 59 0d f6 81 f9 mulss 0x1f981f6(%rip),%xmm1 # 0x1824c3cd4 + 18052badd: 01 + 18052bade: 48 8b d9 mov %rcx,%rbx + 18052bae1: 0f 28 c1 movaps %xmm1,%xmm0 + 18052bae4: e8 c3 91 4e 01 call 0x181a14cac + 18052bae9: f3 0f 11 83 88 08 54 movss %xmm0,0x540888(%rbx) + 18052baf0: 00 + 18052baf1: 48 83 c4 20 add $0x20,%rsp + 18052baf5: 5b pop %rbx + 18052baf6: c3 ret + 18052baf7: cc int3 + 18052baf8: cc int3 + 18052baf9: cc int3 + 18052bafa: cc int3 + 18052bafb: cc int3 + 18052bafc: cc int3 + 18052bafd: cc int3 + 18052bafe: cc int3 + 18052baff: cc int3 + 18052bb00: f3 0f 11 4c 24 10 movss %xmm1,0x10(%rsp) + 18052bb06: 8b 44 24 10 mov 0x10(%rsp),%eax + 18052bb0a: 87 81 74 08 54 00 xchg %eax,0x540874(%rcx) + 18052bb10: c3 ret + 18052bb11: cc int3 + 18052bb12: cc int3 + 18052bb13: cc int3 + 18052bb14: cc int3 + 18052bb15: cc int3 + 18052bb16: cc int3 + 18052bb17: cc int3 + 18052bb18: cc int3 + 18052bb19: cc int3 + 18052bb1a: cc int3 + 18052bb1b: cc int3 + 18052bb1c: cc int3 + 18052bb1d: cc int3 + 18052bb1e: cc int3 + 18052bb1f: cc int3 + 18052bb20: ff 81 a4 08 54 00 incl 0x5408a4(%rcx) + 18052bb26: f3 0f 11 89 84 08 54 movss %xmm1,0x540884(%rcx) + 18052bb2d: 00 + 18052bb2e: c6 81 a0 08 54 00 01 movb $0x1,0x5408a0(%rcx) + 18052bb35: c3 ret + 18052bb36: cc int3 + 18052bb37: cc int3 + 18052bb38: cc int3 + 18052bb39: cc int3 + 18052bb3a: cc int3 + 18052bb3b: cc int3 + 18052bb3c: cc int3 + 18052bb3d: cc int3 + 18052bb3e: cc int3 + 18052bb3f: cc int3 + 18052bb40: ff 81 a4 08 54 00 incl 0x5408a4(%rcx) + 18052bb46: f3 0f 11 89 80 08 54 movss %xmm1,0x540880(%rcx) + 18052bb4d: 00 + 18052bb4e: c6 81 9f 08 54 00 01 movb $0x1,0x54089f(%rcx) + 18052bb55: c3 ret + 18052bb56: cc int3 + 18052bb57: cc int3 + 18052bb58: cc int3 + 18052bb59: cc int3 + 18052bb5a: cc int3 + 18052bb5b: cc int3 + 18052bb5c: cc int3 + 18052bb5d: cc int3 + 18052bb5e: cc int3 + 18052bb5f: cc int3 + 18052bb60: ff 81 a4 08 54 00 incl 0x5408a4(%rcx) + 18052bb66: f3 0f 11 89 7c 08 54 movss %xmm1,0x54087c(%rcx) + 18052bb6d: 00 + 18052bb6e: c6 81 9e 08 54 00 01 movb $0x1,0x54089e(%rcx) + 18052bb75: c3 ret + 18052bb76: cc int3 + 18052bb77: cc int3 + 18052bb78: cc int3 + 18052bb79: cc int3 + 18052bb7a: cc int3 + 18052bb7b: cc int3 + 18052bb7c: cc int3 + 18052bb7d: cc int3 + 18052bb7e: cc int3 + 18052bb7f: cc int3 + 18052bb80: ff 81 a4 08 54 00 incl 0x5408a4(%rcx) + 18052bb86: f3 0f 11 89 78 08 54 movss %xmm1,0x540878(%rcx) + 18052bb8d: 00 + 18052bb8e: c6 81 9d 08 54 00 01 movb $0x1,0x54089d(%rcx) + 18052bb95: c3 ret + 18052bb96: cc int3 + 18052bb97: cc int3 + 18052bb98: cc int3 + 18052bb99: cc int3 + 18052bb9a: cc int3 + 18052bb9b: cc int3 + 18052bb9c: cc int3 + 18052bb9d: cc int3 + 18052bb9e: cc int3 + 18052bb9f: cc int3 + 18052bba0: 40 53 rex push %rbx + 18052bba2: 48 83 ec 20 sub $0x20,%rsp + 18052bba6: f3 0f 59 0d 9a 87 f9 mulss 0x1f9879a(%rip),%xmm1 # 0x1824c4348 + 18052bbad: 01 + 18052bbae: 48 8b d9 mov %rcx,%rbx + 18052bbb1: f3 0f 58 0d eb 88 f9 addss 0x1f988eb(%rip),%xmm1 # 0x1824c44a4 + 18052bbb8: 01 + 18052bbb9: f3 0f 59 0d 13 81 f9 mulss 0x1f98113(%rip),%xmm1 # 0x1824c3cd4 + 18052bbc0: 01 + 18052bbc1: 0f 28 c1 movaps %xmm1,%xmm0 + 18052bbc4: e8 e3 90 4e 01 call 0x181a14cac + 18052bbc9: ff 83 a4 08 54 00 incl 0x5408a4(%rbx) + 18052bbcf: f3 0f 11 83 70 08 54 movss %xmm0,0x540870(%rbx) + 18052bbd6: 00 + 18052bbd7: c6 83 9c 08 54 00 01 movb $0x1,0x54089c(%rbx) + 18052bbde: 48 83 c4 20 add $0x20,%rsp + 18052bbe2: 5b pop %rbx + 18052bbe3: c3 ret + 18052bbe4: cc int3 + 18052bbe5: cc int3 + 18052bbe6: cc int3 + 18052bbe7: cc int3 + 18052bbe8: cc int3 + 18052bbe9: cc int3 + 18052bbea: cc int3 + 18052bbeb: cc int3 + 18052bbec: cc int3 + 18052bbed: cc int3 + 18052bbee: cc int3 + 18052bbef: cc int3 + 18052bbf0: 8b 81 a0 01 00 00 mov 0x1a0(%rcx),%eax + 18052bbf6: c3 ret + 18052bbf7: cc int3 + 18052bbf8: cc int3 + 18052bbf9: cc int3 + 18052bbfa: cc int3 + 18052bbfb: cc int3 + 18052bbfc: cc int3 + 18052bbfd: cc int3 + 18052bbfe: cc int3 + 18052bbff: cc int3 + 18052bc00: 45 33 c9 xor %r9d,%r9d + 18052bc03: 4c 89 09 mov %r9,(%rcx) + 18052bc06: 45 8b c1 mov %r9d,%r8d + 18052bc09: 44 39 49 18 cmp %r9d,0x18(%rcx) + 18052bc0d: 7e 27 jle 0x18052bc36 + 18052bc0f: 41 8b d1 mov %r9d,%edx + 18052bc12: 0f 1f 40 00 nopl 0x0(%rax) + 18052bc16: 66 66 0f 1f 84 00 00 data16 nopw 0x0(%rax,%rax,1) + 18052bc1d: 00 00 00 + 18052bc20: 48 8b 41 10 mov 0x10(%rcx),%rax + 18052bc24: 48 8d 52 04 lea 0x4(%rdx),%rdx + 18052bc28: 41 ff c0 inc %r8d + 18052bc2b: 44 89 4c 02 fc mov %r9d,-0x4(%rdx,%rax,1) + 18052bc30: 44 3b 41 18 cmp 0x18(%rcx),%r8d + 18052bc34: 7c ea jl 0x18052bc20 + 18052bc36: 48 8b 41 10 mov 0x10(%rcx),%rax + 18052bc3a: 48 89 41 20 mov %rax,0x20(%rcx) + 18052bc3e: c3 ret + 18052bc3f: cc int3 + 18052bc40: 48 89 5c 24 08 mov %rbx,0x8(%rsp) + 18052bc45: 57 push %rdi + 18052bc46: 48 83 ec 20 sub $0x20,%rsp + 18052bc4a: 48 8b d9 mov %rcx,%rbx + 18052bc4d: 8b ca mov %edx,%ecx + 18052bc4f: e8 2c 03 e9 00 call 0x1813bbf80 + 18052bc54: 8b f8 mov %eax,%edi + 18052bc56: 39 43 08 cmp %eax,0x8(%rbx) + 18052bc59: 74 0e je 0x18052bc69 + 18052bc5b: 48 8d 4b 10 lea 0x10(%rbx),%rcx + 18052bc5f: 0f .byte 0xf diff --git a/handoff/nls_dasm/f_52bba0.dis b/handoff/nls_dasm/f_52bba0.dis new file mode 100644 index 0000000..c338f0b --- /dev/null +++ b/handoff/nls_dasm/f_52bba0.dis @@ -0,0 +1,148 @@ +000000018052bba0 <.data>: + 18052bba0: 40 53 rex push %rbx + 18052bba2: 48 83 ec 20 sub $0x20,%rsp + 18052bba6: f3 0f 59 0d 9a 87 f9 mulss 0x1f9879a(%rip),%xmm1 # 0x1824c4348 + 18052bbad: 01 + 18052bbae: 48 8b d9 mov %rcx,%rbx + 18052bbb1: f3 0f 58 0d eb 88 f9 addss 0x1f988eb(%rip),%xmm1 # 0x1824c44a4 + 18052bbb8: 01 + 18052bbb9: f3 0f 59 0d 13 81 f9 mulss 0x1f98113(%rip),%xmm1 # 0x1824c3cd4 + 18052bbc0: 01 + 18052bbc1: 0f 28 c1 movaps %xmm1,%xmm0 + 18052bbc4: e8 e3 90 4e 01 call 0x181a14cac + 18052bbc9: ff 83 a4 08 54 00 incl 0x5408a4(%rbx) + 18052bbcf: f3 0f 11 83 70 08 54 movss %xmm0,0x540870(%rbx) + 18052bbd6: 00 + 18052bbd7: c6 83 9c 08 54 00 01 movb $0x1,0x54089c(%rbx) + 18052bbde: 48 83 c4 20 add $0x20,%rsp + 18052bbe2: 5b pop %rbx + 18052bbe3: c3 ret + 18052bbe4: cc int3 + 18052bbe5: cc int3 + 18052bbe6: cc int3 + 18052bbe7: cc int3 + 18052bbe8: cc int3 + 18052bbe9: cc int3 + 18052bbea: cc int3 + 18052bbeb: cc int3 + 18052bbec: cc int3 + 18052bbed: cc int3 + 18052bbee: cc int3 + 18052bbef: cc int3 + 18052bbf0: 8b 81 a0 01 00 00 mov 0x1a0(%rcx),%eax + 18052bbf6: c3 ret + 18052bbf7: cc int3 + 18052bbf8: cc int3 + 18052bbf9: cc int3 + 18052bbfa: cc int3 + 18052bbfb: cc int3 + 18052bbfc: cc int3 + 18052bbfd: cc int3 + 18052bbfe: cc int3 + 18052bbff: cc int3 + 18052bc00: 45 33 c9 xor %r9d,%r9d + 18052bc03: 4c 89 09 mov %r9,(%rcx) + 18052bc06: 45 8b c1 mov %r9d,%r8d + 18052bc09: 44 39 49 18 cmp %r9d,0x18(%rcx) + 18052bc0d: 7e 27 jle 0x18052bc36 + 18052bc0f: 41 8b d1 mov %r9d,%edx + 18052bc12: 0f 1f 40 00 nopl 0x0(%rax) + 18052bc16: 66 66 0f 1f 84 00 00 data16 nopw 0x0(%rax,%rax,1) + 18052bc1d: 00 00 00 + 18052bc20: 48 8b 41 10 mov 0x10(%rcx),%rax + 18052bc24: 48 8d 52 04 lea 0x4(%rdx),%rdx + 18052bc28: 41 ff c0 inc %r8d + 18052bc2b: 44 89 4c 02 fc mov %r9d,-0x4(%rdx,%rax,1) + 18052bc30: 44 3b 41 18 cmp 0x18(%rcx),%r8d + 18052bc34: 7c ea jl 0x18052bc20 + 18052bc36: 48 8b 41 10 mov 0x10(%rcx),%rax + 18052bc3a: 48 89 41 20 mov %rax,0x20(%rcx) + 18052bc3e: c3 ret + 18052bc3f: cc int3 + 18052bc40: 48 89 5c 24 08 mov %rbx,0x8(%rsp) + 18052bc45: 57 push %rdi + 18052bc46: 48 83 ec 20 sub $0x20,%rsp + 18052bc4a: 48 8b d9 mov %rcx,%rbx + 18052bc4d: 8b ca mov %edx,%ecx + 18052bc4f: e8 2c 03 e9 00 call 0x1813bbf80 + 18052bc54: 8b f8 mov %eax,%edi + 18052bc56: 39 43 08 cmp %eax,0x8(%rbx) + 18052bc59: 74 0e je 0x18052bc69 + 18052bc5b: 48 8d 4b 10 lea 0x10(%rbx),%rcx + 18052bc5f: 0f 57 d2 xorps %xmm2,%xmm2 + 18052bc62: 8b d0 mov %eax,%edx + 18052bc64: e8 27 25 00 00 call 0x18052e190 + 18052bc69: 45 33 c0 xor %r8d,%r8d + 18052bc6c: 89 7b 08 mov %edi,0x8(%rbx) + 18052bc6f: 4c 89 03 mov %r8,(%rbx) + 18052bc72: 41 8b d0 mov %r8d,%edx + 18052bc75: 44 39 43 18 cmp %r8d,0x18(%rbx) + 18052bc79: 7e 19 jle 0x18052bc94 + 18052bc7b: 41 8b c8 mov %r8d,%ecx + 18052bc7e: 66 90 xchg %ax,%ax + 18052bc80: 48 8b 43 10 mov 0x10(%rbx),%rax + 18052bc84: 48 8d 49 04 lea 0x4(%rcx),%rcx + 18052bc88: ff c2 inc %edx + 18052bc8a: 44 89 44 01 fc mov %r8d,-0x4(%rcx,%rax,1) + 18052bc8f: 3b 53 18 cmp 0x18(%rbx),%edx + 18052bc92: 7c ec jl 0x18052bc80 + 18052bc94: 48 8b 43 10 mov 0x10(%rbx),%rax + 18052bc98: 48 89 43 20 mov %rax,0x20(%rbx) + 18052bc9c: 48 8b 5c 24 30 mov 0x30(%rsp),%rbx + 18052bca1: 48 83 c4 20 add $0x20,%rsp + 18052bca5: 5f pop %rdi + 18052bca6: c3 ret + 18052bca7: cc int3 + 18052bca8: cc int3 + 18052bca9: cc int3 + 18052bcaa: cc int3 + 18052bcab: cc int3 + 18052bcac: cc int3 + 18052bcad: cc int3 + 18052bcae: cc int3 + 18052bcaf: cc int3 + 18052bcb0: 48 89 5c 24 08 mov %rbx,0x8(%rsp) + 18052bcb5: 57 push %rdi + 18052bcb6: 48 83 ec 20 sub $0x20,%rsp + 18052bcba: 33 ff xor %edi,%edi + 18052bcbc: 48 8b d9 mov %rcx,%rbx + 18052bcbf: 48 89 79 20 mov %rdi,0x20(%rcx) + 18052bcc3: 39 79 18 cmp %edi,0x18(%rcx) + 18052bcc6: 7e 20 jle 0x18052bce8 + 18052bcc8: 48 8b 49 10 mov 0x10(%rcx),%rcx + 18052bccc: 48 85 c9 test %rcx,%rcx + 18052bccf: 74 05 je 0x18052bcd6 + 18052bcd1: e8 ea 53 ad ff call 0x1800010c0 + 18052bcd6: 48 89 7b 10 mov %rdi,0x10(%rbx) + 18052bcda: 89 7b 18 mov %edi,0x18(%rbx) + 18052bcdd: 48 8b 5c 24 30 mov 0x30(%rsp),%rbx + 18052bce2: 48 83 c4 20 add $0x20,%rsp + 18052bce6: 5f pop %rdi + 18052bce7: c3 ret + 18052bce8: 48 8b 5c 24 30 mov 0x30(%rsp),%rbx + 18052bced: 48 89 79 10 mov %rdi,0x10(%rcx) + 18052bcf1: 89 79 18 mov %edi,0x18(%rcx) + 18052bcf4: 48 83 c4 20 add $0x20,%rsp + 18052bcf8: 5f pop %rdi + 18052bcf9: c3 ret + 18052bcfa: cc int3 + 18052bcfb: cc int3 + 18052bcfc: cc int3 + 18052bcfd: cc int3 + 18052bcfe: cc int3 + 18052bcff: cc int3 + 18052bd00: 40 55 rex push %rbp + 18052bd02: 56 push %rsi + 18052bd03: 57 push %rdi + 18052bd04: 48 83 ec 40 sub $0x40,%rsp + 18052bd08: 48 c7 44 24 28 fe ff movq $0xfffffffffffffffe,0x28(%rsp) + 18052bd0f: ff ff + 18052bd11: 48 89 5c 24 68 mov %rbx,0x68(%rsp) + 18052bd16: 48 8b 05 53 9c 0e 02 mov 0x20e9c53(%rip),%rax # 0x182615970 + 18052bd1d: 48 33 c4 xor %rsp,%rax + 18052bd20: 48 89 44 24 38 mov %rax,0x38(%rsp) + 18052bd25: 49 8b f8 mov %r8,%rdi + 18052bd28: 4c 8b ca mov %rdx,%r9 + 18052bd2b: 48 8b f1 mov %rcx,%rsi + 18052bd2e: 4c rex.WR + 18052bd2f: 89 .byte 0x89