P4: F4 geometry test — internal 48000/4096 does NOT close residual (0.68 vs 1.00); all structural adaptations rejected
Tested internal-geometry (48000/4096 + resample) — worse. Combined with earlier negative results (parametric LUT x6, FFT-conv window, combine acc), every structural adaptation is rejected. Bridge (Pchip 0.774) = empirical ceiling. Bytes require live A/B/gamma capture or bit-exact exp2/FFT kernels.
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@@ -1077,3 +1077,16 @@ structural pieces belong to the exp2(mask) chain which regressed (Phase B, da63a
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replaced it with the log-domain LUT bridge). The bridge (Pchip, 0.773) remains canonical.
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Path to bytes stays: exact A/B/gamma (blocked live), SR geom 48000/4096, bit-exact
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exp2/FFT. No code change made this session; NOTE-only.
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## ============ UPDATE 2026-08-20x: F2/F4 structural geometry test — NOT the gap ============
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Tested internal-geometry hypothesis (internal DSP SR=48000/N=4096 vs host 44100/2048):
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render the bridge at 48000/4096 with scipy resample_poly in/out to 44100:
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host44100/2048 : mean|err| 0.683 (subset)
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internal48000/4096: mean|err| 1.004 (worse)
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=> geometry/SR-mismatch is NOT the source of the level-dependent residuals.
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ALL structural adaptations tried and rejected (doc'd): parametric LUT sets (6), FFT-conv
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window (step5), combine 0x5407c8 accumulator, internal 48000/4096 geometry. The bridge
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(Pchip, full-corpus mean 0.774) remains canonical; empirical ceiling.
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Remaining real paths to bytes: (F1) live capture of level-path object (A/B/gamma) OR
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(F5) bit-exact exp2/FFT kernels — neither changes the mean but both are required for
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byte parity. No code change; NOTE-only.
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