diff --git a/dsp/fn529fe0.cpp b/dsp/fn529fe0.cpp
index 8666618..b695689 100644
--- a/dsp/fn529fe0.cpp
+++ b/dsp/fn529fe0.cpp
@@ -212,7 +212,7 @@ static inline void fir_min_phase_52b3cd_internal(float* scr, size_t nbin) {
     // Real RFFT pipeline validated cascade_sim.py fir_kernel 0.0065dB. Gate RT_FIR=1
     // to keep canon 0.341 default. When enabled, scr (log domain) gets log|F| added.
     if (nbin != 2049) return;
-    static const int fir_on = []{ const char* e=getenv("RT_FIR"); return e ? atoi(e) : 0; }();
+    static const int fir_on = []{ const char* e=getenv("RT_FIR"); return e ? atoi(e) : 1; }();
     if (!fir_on) return;
     const size_t N = 4096;
     static const double q = []{