23b: mask->FIR chain decoded — DESIGN body is vectorized LOG2 of band curve (poly fingerprinted), WIN_freq identified as periodic Hann(4096) falling half applied to FIR[n/2..n), full ILT stub->impl table resolved offline (ilt_resolve.py), live buffer catalog extended (SIMD lane masks at 0x540598, complex identity reset between callbacks, overlap buffer at 0x5406f8 non-zero), plugin output proven nondeterministic across renders (LCG dither) — spectral metrics only; ptrace lab scripts + lessons (TRACECLONE before CONT, sub-second host lifecycle under -renderproject)

2026-08-23 20:59:54 +03:00
parent 07cd4b7dc0
commit b8d5f83fc5
39 changed files with 190417 additions and 0 deletions
@@ -0,0 +1,93 @@
+#!/usr/bin/env python3
+"""ilt_resolve.py — resolve ILT dispatch stubs of soothe_mem.bin (raw dump, base 0x180000000).
+
+Stub pattern (7+7+4 bytes):
+    48 63 05 rel32      mov  eax, [rip+rel32]     ; slot index (runtime-fixed after reloc)
+    4c 8d 15 rel32      lea  r10, [rip+rel32]     ; pointer table base
+    41 ff 24 d2         jmp  qword ptr [r10+rax*8]
+
+Resolution (all offline from the dump, post-relocation values):
+    idx_addr = stub + 7  + rel32_a
+    tbl_addr = stub + 14 + rel32_b
+    impl     = u64[tbl_addr + idx * 8]
+
+Usage: ilt_resolve.py [VA ...]        (default: FIR-loop + main-loop stub set)
+"""
+import struct
+import sys
+
+BASE = 0x180000000
+BIN = '/home/m/re-tools/soothe_mem.bin'
+_data = open(BIN, 'rb').read()
+
+
+def rd(va, n):
+    off = va - BASE
+    return _data[off:off + n]
+
+
+def u32(va):
+    return struct.unpack('<I', rd(va, 4))[0]
+
+
+def u64(va):
+    return struct.unpack('<Q', rd(va, 8))[0]
+
+
+def resolve_stub(va):
+    """Return dict describing the ILT stub at va, or None if pattern mismatch."""
+    b = rd(va, 18)
+    if len(b) < 18 or b[0] != 0x48 or b[1] != 0x63 or b[2] != 0x05:
+        return None
+    rel_a = struct.unpack_from('<i', b, 3)[0]
+    if b[7] != 0x4C or b[8] != 0x8D or b[9] != 0x15:
+        return None
+    rel_b = struct.unpack_from('<i', b, 10)[0]
+    idx_addr = va + 7 + rel_a
+    tbl_addr = va + 14 + rel_b
+    idx = u32(idx_addr)
+    impl = u64(tbl_addr + idx * 8)
+    return dict(stub=va, idx_addr=idx_addr, idx=idx,
+                tbl_addr=tbl_addr, impl=impl)
+
+
+DEFAULT_STUBS = [
+    # FIR-build loop 52b550..52b8bb
+    0x180002210,  # copy scratch->FIR ?
+    0x180002180,  # complex-op A/C (float)
+    0x180001bb0,  # complex-op A/C (double)
+    0x180001a90,  # complex-op B/D (float)
+    0x1800019d0,  # complex-op B/D (double)
+    0x180001880,  # paired-scalar op 1 (flag branch)
+    0x180001ca0,  # paired-scalar op 2 (flag branch)
+    0x180001df0,  # final op (float)
+    0x180001f70,  # final op (double)
+    # import thunks of 535a70 dispatcher
+    0x180140a10,
+    0x180140a70,
+    # main-loop transforms referenced by BLOCKMAP
+    0x180002030, 0x180001d30, 0x180002270, 0x1800022a0,
+    0x180001970, 0x180001a60, 0x180001850, 0x180002000,
+    0x180001c40, 0x180001fa0, 0x180001940, 0x180001f10,
+    0x180001c70, 0x180001d60, 0x1800019a0, 0x180001a00,
+]
+
+
+def main():
+    args = [int(a, 16) if not a.startswith('0x') else int(a, 0)
+            for a in sys.argv[1:]] or DEFAULT_STUBS
+    print(f'{"stub":>12} {"idx@":>12} {"idx":>4} {"table":>12} {"impl":>12}')
+    rows = []
+    for va in args:
+        r = resolve_stub(va)
+        if r is None:
+            print(f'{va:#12x}  PATTERN MISMATCH')
+            continue
+        rows.append(r)
+        print(f'{r["stub"]:#12x} {r["idx_addr"]:#12x} {r["idx"]:4d} '
+              f'{r["tbl_addr"]:#12x} {r["impl"]:#12x}')
+    return rows
+
+
+if __name__ == '__main__':
+    main()