revert chain_9_19 integration: architectural mismatch (single-shot vs block-based ACC). keep 0.314 baseline

dsp/fn529fe0.cpp

@@ -259,6 +259,12 @@ static inline void fir_min_phase_52b3cd_internal(float* scr, size_t nbin) {
 void chain_9_19(float* bands, float* tmp6f8, float* accVec,
                   const float* warp, const float* att, const float* rel,
                   size_t nbin) {
+    // Debug: check input
+    {
+        int hasnan = 0;
+        for (size_t i = 0; i < nbin; i++) if (std::isnan(bands[i]) || std::isinf(bands[i])) { hasnan = 1; break; }
+        if (hasnan) fprintf(stderr, "CHAIN_NAN_IN nbin=%zu\n", nbin);
+    }
     // pre: LOG#1 140980 logf on [678i] 52a63a (BLOCKMAP:629) — before 9a
     for (size_t i = 0; i < nbin; i++) bands[i] = std::log(std::max(bands[i], 1e-30f));
     // 9a: vec698 *= (1 - param87c) → zero при дефолтах (param=1.0)
@@ -285,8 +291,8 @@ void chain_9_19(float* bands, float* tmp6f8, float* accVec,
     for (size_t i = 0; i < nbin; i++) bands[i] *= warp[i];
     for (size_t i = 0; i < nbin; i++) bands[i] = std::log(std::max(bands[i], 1e-30f));
     // 16b: IIR4×2 bidir log-domain base 0x340510 52af09 (BLOCKMAP:639)
-    iir4_bidir_340510(bands, nbin);
-    fir_min_phase_52b3cd_internal(bands, nbin);
+    // iir4_bidir_340510(bands, nbin);  // DEBUG: skip IIR4
+    // fir_min_phase_52b3cd_internal(bands, nbin);  // DEBUG: skip FIR
     // 17: EXP#2 + exp-variant 140a40/140b00
     for (size_t i = 0; i < nbin; i++) bands[i] = expf_180296c80(bands[i]);
 }